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6th May 2021

IBM reveals world's first 2nm chip

Computing giant IBM has announced the first chips based on a 2 nanometre (nm) process, allowing 50 billion transistors to be crammed onto an area the size of a fingernail, which could be arriving in 2024.


worlds first 2nm chip
Credit: IBM


Transistors are the fundamental components in any modern computer – microscopic electrical switches that perform countless operations every second and enable your PC, laptop, smartphone and other devices to handle information. First emerging in 1958, they became integrated onto microchips in the 1970s and subsequently grew in density by orders of magnitude, a trend known as Moore's Law.

In recent years, transistors have been miniaturised to almost unimaginably tiny sizes. The iPhone 12, for example, features the first ARM-based smartphone system-on-a-chip manufactured using a 5 nanometre (nm) process node, which packs together 11.8 billion transistors. A nanometre is a billionth of a metre (0.000000001 m). For comparison, the smallest viruses are 20nm in diameter, a DNA helix is 3nm long, while the largest atom (caesium) is 0.5nm wide.

Shrinking these components down to ever-smaller scales is now a great technical challenge. With each new generation of chips, concerns are raised over a potential slowdown in the rate of progress and the looming threat of physical limits.

Some good news arrived today, however, as IBM just announced the latest milestone in transistor technology, with a chip based on 2nm process nodes. IBM has a research facility in Albany, New York, where it collaborates with the State University of New York alongside leading chip manufacturers.

"It's an important signal that the United States is not only not far behind, but in some instances is actually ahead. IBM's research group in Albany has really been one of the best centres for this type of research for the last 10 years," said Dan Hutcheson, CEO of VLSI, a semiconductor market research firm.


worlds first 2nm chip
Credit: IBM


As seen above, the new design includes three silicon nanosheets, stacked on top of each other. These are surrounded on all four sides by a gate, the part that switches current on or off. This "gate-all-around" technique reduces voltage leakage, which has become more of an issue as transistors shrink. This is an improvement on current "FinFET" transistors, in which the gate only surrounds three sides.

"It's a tremendously exciting technology," said Jesús del Alamo, a professor at MIT who specialises in novel transistor technologies. "It's a completely new design that pushes forward the roadmap for the future."

In a slide presentation, IBM states that its nanosheet transistors will reduce power consumption by 75% and boost chip performance by 45%, compared to 7nm processors of today. 50 billion of them will fit within an area of 150 square millimetres, giving a density of 333 million transistors per square millimetre.

"We have the transistor device to make it happen, and we are seeing the performance improvements," said Dario Gil, head of IBM Research. "The entire industry is going to use this transistor technology."

The potential benefits of these 2nm chips would be many and various. In addition to general speed improvements for computing, the battery life of smartphones could be quadrupled, only requiring users to charge devices every four days. The carbon footprint of data centres, which account for 1% of global energy use, could be reduced by the greater energy efficiency. Faster object detection and reaction times in autonomous vehicles like self-driving cars would be possible.

Few other details have been shared at this stage. Whether silicon-germanium is used in the 2nm process, for example, or the problem of interconnect scaling and how that will be achieved, is unclear. However, IBM expects mass production by late 2024 or 2025. Looking beyond those dates, the company has previously published a roadmap that included plans for 1.4nm in 2029.




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